adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13
movl r25=init_task
-#ifdef CONFIG_XEN
- movl r27=XSI_KR0+(IA64_KR_CURRENT_STACK*8)
- ;;
- ld8 r27=[r27]
-#else
mov r27=IA64_KR(CURRENT_STACK)
-#endif
adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
dep r20=0,in0,61,3 // physical address of "next"
;;
(p6) srlz.d
#endif
ld8 sp=[r21] // load kernel stack pointer of new task
-#ifdef CONFIG_XEN
- movl r8=XSI_KR0+(IA64_KR_CURRENT*8)
- ;;
- st8 [r8]=in0
-#else
mov IA64_KR(CURRENT)=in0 // update "current" application register
-#endif
mov r8=r13 // return pointer to previously running task
mov r13=in0 // set "current" pointer
;;
st8 [r8]=in0 // VA of next task...
;;
mov r25=IA64_TR_CURRENT_STACK
- movl r8=XSI_KR0+(IA64_KR_CURRENT_STACK*8)
- ;;
- st8 [r8]=r26
#else
mov cr.itir=r25
mov cr.ifa=in0 // VA of next task...
;;
mov r25=IA64_TR_CURRENT_STACK
- mov IA64_KR(CURRENT_STACK)=r26 // remember last page we mapped...
#endif
+ mov IA64_KR(CURRENT_STACK)=r26 // remember last page we mapped...
;;
itr.d dtr[r25]=r23 // wire in new mapping...
br.cond.sptk .done
bsw.0 // switch back to bank 0 (no stop bit required beforehand...)
#endif
;;
-#ifdef CONFIG_XEN
-(pUStk) movl r18=XSI_KR0+(IA64_KR_CURRENT*8)
- ;;
-(pUStk) ld8 r18=[r18]
- ;;
-#else
(pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
-#endif
adds r16=PT(CR_IPSR)+16,r12
adds r17=PT(CR_IIP)+16,r12
rsm psr.dt // use physical addressing for data
#endif
mov r31=pr // save the predicate registers
-#ifdef CONFIG_XEN
- movl r19=XSI_KR0+(IA64_KR_PT_BASE*8) // get the page table base address
- ;;
- ld8 r19=[r19]
-#else
mov r19=IA64_KR(PT_BASE) // get page table base address
-#endif
shl r21=r16,3 // shift bit 60 into sign bit
shr.u r17=r16,61 // get the region number into r17
;;
#else
rsm psr.dt // switch to using physical data addressing
#endif
-#ifdef CONFIG_XEN
- movl r19=XSI_KR0+(IA64_KR_PT_BASE*8) // get the page table base address
- ;;
- ld8 r19=[r19]
-#else
mov r19=IA64_KR(PT_BASE) // get the page table base address
-#endif
shl r21=r16,3 // shift bit 60 into sign bit
;;
shr.u r17=r16,61 // get the region number into r17
* to prevent leaking bits from kernel to user level.
*/
DBG_FAULT(11)
+ mov r16=IA64_KR(CURRENT) // r16 = current task; 12 cycle read lat.
#ifdef CONFIG_XEN
movl r31=XSI_IPSR
;;
mov r27=ar.rsc
mov r26=ar.pfs
;;
- adds r31=(XSI_KR0+(IA64_KR_CURRENT*8))-XSI_IIM,r31
- ;;
- ld8 r16=[r31] // r16 = current task
#else
- mov r16=IA64_KR(CURRENT) // r16 = current task; 12 cycle read lat.
mov r17=cr.iim
mov r18=__IA64_BREAK_SYSCALL
mov r21=ar.fpsr
*/
#ifdef CONFIG_XEN
#define DO_SAVE_MIN(COVER,SAVE_IFS,EXTRA) \
- /*MINSTATE_GET_CURRENT(r16); /* M (or M;;I) */ \
- movl r16=XSI_KR0+(IA64_KR_CURRENT*8);; \
- ld8 r16=[r16];; \
+ MINSTATE_GET_CURRENT(r16); /* M (or M;;I) */ \
mov r27=ar.rsc; /* M */ \
mov r20=r1; /* A */ \
mov r25=ar.unat; /* M */ \
;; \
.mem.offset 0,0; st8.spill [r16]=r13,16; \
.mem.offset 8,0; st8.spill [r17]=r21,16; /* save ar.fpsr */ \
- /* mov r13=IA64_KR(CURRENT); /* establish `current' */ \
- movl r21=XSI_KR0+(IA64_KR_CURRENT*8);; \
- ld8 r13=[r21];; \
+ mov r13=IA64_KR(CURRENT); /* establish `current' */ \
;; \
.mem.offset 0,0; st8.spill [r16]=r15,16; \
.mem.offset 8,0; st8.spill [r17]=r14,16; \
XEN_HYPER_SSM_I; \
})
-/* kernel register paravirtualization may soon go away */
-#define xen_get_kr(regnum) (((unsigned long *)(XSI_KR0))[regnum])
-#define xen_set_kr(regnum,val) ((((unsigned long *)(XSI_KR0))[regnum]) = val)
+// for now, just use privop. may use hyperprivop later
+#define xen_set_kr(regnum,val) (__ia64_setreg(regnum,val))
/* turning off interrupts can be paravirtualized simply by writing
* to a memory-mapped virtual psr.i bit (implemented as a 16-bit bool) */
__u64 ia64_intri_res; \
\
switch(regnum) { \
- case _IA64_REG_AR_KR0 ... _IA64_REG_AR_KR7: \
- ia64_intri_res = (running_on_xen) ? \
- xen_get_kr((regnum-_IA64_REG_AR_KR0)) : \
- __ia64_getreg(regnum); \
- break; \
case _IA64_REG_CR_IVR: \
ia64_intri_res = (running_on_xen) ? \
xen_get_ivr() : \